Article: Load-balanced three-stage switch
| Title | Load-balanced three-stage switch | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| Authors | Hu, B1 Yeung, KL1 Zhang, Z1 | ||||||||||
| Keywords | Load-Balanced Switch Ring Fairness Three-Stage Switch Two-Stage Switch | ||||||||||
| Issue Date | 2012 | ||||||||||
| Publisher | Academic Press. The Journal's web site is located at http://www.elsevier.com/locate/jnca | ||||||||||
| Citation | Journal Of Network And Computer Applications, 2012, v. 35 n. 1, p. 502-509 [How to Cite?] DOI: http://dx.doi.org/10.1016/j.jnca.2011.10.011 | ||||||||||
| Abstract | A load-balanced two-stage switch is scalable and can provide close to 100% throughput. Its major problem is that packets can be mis-sequenced when they arrive at outputs. In a recent work, the packet mis-sequencing problem is elegantly solved by a feedback-based switch architecture. In this paper, we extend the feedback-based switch from two-stage to three-stage for further cutting down average packet delay while still ensuring in-order packet delivery and close to 100% throughput. The basic idea is to use the third stage switch to map heavy flows to experience less middle-stage delays. To identity heavy flows, an adaptive traffic estimation algorithm is proposed. To ensure maxmin fairness in bandwidth allocation under any inadmissible traffic pattern, an efficient fair scheduler is devised. © 2011 Elsevier Ltd. All rights reserved. | ||||||||||
| ISSN | 1084-8045 2011 Impact Factor: 1.065 2011 SCImago Journal Rankings: 0.045 | ||||||||||
| DOI | http://dx.doi.org/10.1016/j.jnca.2011.10.011 | ||||||||||
| ISI Accession Number ID | WOS:000298338600042
Funding Information: This work was supported in part by Zhejiang Provincial Natural Science Foundation of China (No. Y1100388), Zhejiang Provincial Public Technology Research of China (No. 2010C31071), Fundamental Research Funds for the Central Universities (No. 2010QNA5032), National Science and Technology Major Project (No. 2011ZX03003-003-03). | ||||||||||
| References | References in Scopus |
| dc.contributor.author | Hu, B | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| dc.contributor.author | Yeung, KL | ||||||||||
| dc.contributor.author | Zhang, Z | ||||||||||
| dc.date.accessioned | 2012-08-08T08:34:53Z | ||||||||||
| dc.date.available | 2012-08-08T08:34:53Z | ||||||||||
| dc.date.issued | 2012 | ||||||||||
| dc.description.abstract | A load-balanced two-stage switch is scalable and can provide close to 100% throughput. Its major problem is that packets can be mis-sequenced when they arrive at outputs. In a recent work, the packet mis-sequencing problem is elegantly solved by a feedback-based switch architecture. In this paper, we extend the feedback-based switch from two-stage to three-stage for further cutting down average packet delay while still ensuring in-order packet delivery and close to 100% throughput. The basic idea is to use the third stage switch to map heavy flows to experience less middle-stage delays. To identity heavy flows, an adaptive traffic estimation algorithm is proposed. To ensure maxmin fairness in bandwidth allocation under any inadmissible traffic pattern, an efficient fair scheduler is devised. © 2011 Elsevier Ltd. All rights reserved. | ||||||||||
| dc.description.nature | Link_to_subscribed_fulltext | ||||||||||
| dc.identifier.citation | Journal Of Network And Computer Applications, 2012, v. 35 n. 1, p. 502-509 [How to Cite?] DOI: http://dx.doi.org/10.1016/j.jnca.2011.10.011 | ||||||||||
| dc.identifier.doi | http://dx.doi.org/10.1016/j.jnca.2011.10.011 | ||||||||||
| dc.identifier.epage | 509 | ||||||||||
| dc.identifier.isi | WOS:000298338600042
Funding Information: This work was supported in part by Zhejiang Provincial Natural Science Foundation of China (No. Y1100388), Zhejiang Provincial Public Technology Research of China (No. 2010C31071), Fundamental Research Funds for the Central Universities (No. 2010QNA5032), National Science and Technology Major Project (No. 2011ZX03003-003-03). | ||||||||||
| dc.identifier.issn | 1084-8045 2011 Impact Factor: 1.065 2011 SCImago Journal Rankings: 0.045 | ||||||||||
| dc.identifier.issue | 1 | ||||||||||
| dc.identifier.scopus | eid_2-s2.0-82155166277 | ||||||||||
| dc.identifier.spage | 502 | ||||||||||
| dc.identifier.uri | http://hdl.handle.net/10722/155702 | ||||||||||
| dc.identifier.volume | 35 | ||||||||||
| dc.language | eng | ||||||||||
| dc.publisher | Academic Press. The Journal's web site is located at http://www.elsevier.com/locate/jnca | ||||||||||
| dc.publisher.place | United Kingdom | ||||||||||
| dc.relation.ispartof | Journal of Network and Computer Applications | ||||||||||
| dc.relation.references | References in Scopus | ||||||||||
| dc.subject | Load-Balanced Switch | ||||||||||
| dc.subject | Ring Fairness | ||||||||||
| dc.subject | Three-Stage Switch | ||||||||||
| dc.subject | Two-Stage Switch | ||||||||||
| dc.title | Load-balanced three-stage switch | ||||||||||
| dc.type | Article |
Author Affiliations
- Zhejiang University