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Article: Improved interface properties of Ge metal-oxide-semiconductor capacitor with TaTiO gate dielectric by using in situ TaON passivation interlayer

TitleImproved interface properties of Ge metal-oxide-semiconductor capacitor with TaTiO gate dielectric by using in situ TaON passivation interlayer
Authors
Issue Date2011
PublisherAmerican Institute of Physics. The Journal's web site is located at http://apl.aip.org/
Citation
Applied Physics Letters, 2011, v. 98 n. 18 How to Cite?
AbstractTaON is in situ formed as a passivating interlayer in Ge metal-oxide-semiconductor (MOS) capacitors with high-k TaTiO gate dielectric fabricated simply by alternate sputtering of Ta and Ti. Also, postdeposition annealing is performed in wet N 2 to suppress the growth of unstable GeO x at the Ge surface. As a result, excellent electrical properties of the Ge MOS devices are demonstrated, such as high equivalent dielectric constant (22.1), low interface-state density (7.3× 10 11 cm -2 eV), small gate leakage current (8.6× 10 -4 A cm -2 at V g -V fb =1 V), and high device reliability. Transmission electron microscopy and x-ray photoelectron spectroscopy support that all these should be attributed to the fact that the nitrogen barrier in the TaON interlayer can effectively block the interdiffusions of Ge and Ta, and the wet- N 2 anneal can significantly suppress the growth of unstable low-k GeO x. © 2011 American Institute of Physics.
Persistent Identifierhttp://hdl.handle.net/10722/155613
ISSN
2015 Impact Factor: 3.142
2015 SCImago Journal Rankings: 1.105
ISI Accession Number ID
Funding AgencyGrant Number
National Natural Science Foundation of China60776016
Postdoctoral Science Foundation of China20100470056
RGC of HKSAR, ChinaHKU 713308E
Funding Information:

This work is financially supported by the National Natural Science Foundation of China (Grant No. 60776016), the Postdoctoral Science Foundation of China (Grant No. 20100470056), the RGC of HKSAR, China (Project No. HKU 713308E).

References
Grants

 

DC FieldValueLanguage
dc.contributor.authorJi, Fen_US
dc.contributor.authorXu, JPen_US
dc.contributor.authorLiu, JGen_US
dc.contributor.authorLi, CXen_US
dc.contributor.authorLai, PTen_US
dc.date.accessioned2012-08-08T08:34:22Z-
dc.date.available2012-08-08T08:34:22Z-
dc.date.issued2011en_US
dc.identifier.citationApplied Physics Letters, 2011, v. 98 n. 18en_US
dc.identifier.issn0003-6951en_US
dc.identifier.urihttp://hdl.handle.net/10722/155613-
dc.description.abstractTaON is in situ formed as a passivating interlayer in Ge metal-oxide-semiconductor (MOS) capacitors with high-k TaTiO gate dielectric fabricated simply by alternate sputtering of Ta and Ti. Also, postdeposition annealing is performed in wet N 2 to suppress the growth of unstable GeO x at the Ge surface. As a result, excellent electrical properties of the Ge MOS devices are demonstrated, such as high equivalent dielectric constant (22.1), low interface-state density (7.3× 10 11 cm -2 eV), small gate leakage current (8.6× 10 -4 A cm -2 at V g -V fb =1 V), and high device reliability. Transmission electron microscopy and x-ray photoelectron spectroscopy support that all these should be attributed to the fact that the nitrogen barrier in the TaON interlayer can effectively block the interdiffusions of Ge and Ta, and the wet- N 2 anneal can significantly suppress the growth of unstable low-k GeO x. © 2011 American Institute of Physics.en_US
dc.languageengen_US
dc.publisherAmerican Institute of Physics. The Journal's web site is located at http://apl.aip.org/en_US
dc.relation.ispartofApplied Physics Lettersen_US
dc.titleImproved interface properties of Ge metal-oxide-semiconductor capacitor with TaTiO gate dielectric by using in situ TaON passivation interlayeren_US
dc.typeArticleen_US
dc.identifier.emailLai, PT:laip@eee.hku.hken_US
dc.identifier.authorityLai, PT=rp00130en_US
dc.description.naturelink_to_subscribed_fulltexten_US
dc.identifier.doi10.1063/1.3581891en_US
dc.identifier.scopuseid_2-s2.0-79957466868en_US
dc.relation.referenceshttp://www.scopus.com/mlt/select.url?eid=2-s2.0-79957466868&selection=ref&src=s&origin=recordpageen_US
dc.identifier.volume98en_US
dc.identifier.issue18en_US
dc.identifier.isiWOS:000290392300039-
dc.publisher.placeUnited Statesen_US
dc.relation.projectHigh-k Gate Dielectrics for High-Performance Germanium MISFET's-
dc.identifier.scopusauthoridJi, F=8238553900en_US
dc.identifier.scopusauthoridXu, JP=35754128700en_US
dc.identifier.scopusauthoridLiu, JG=35206342900en_US
dc.identifier.scopusauthoridLi, CX=13906721600en_US
dc.identifier.scopusauthoridLai, PT=7202946460en_US

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