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Article: Effects of fluorine incorporation on the properties of Ge p-MOS capacitors with HfTiON dielectric
Title | Effects of fluorine incorporation on the properties of Ge p-MOS capacitors with HfTiON dielectric | ||||||||
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Authors | |||||||||
Keywords | Fluorine passivation Ge High-k dielectric MOS | ||||||||
Issue Date | 2010 | ||||||||
Publisher | Pergamon. The Journal's web site is located at http://www.elsevier.com/locate/sse | ||||||||
Citation | Solid-State Electronics, 2010, v. 54 n. 7, p. 675-679 How to Cite? | ||||||||
Abstract | In this work, Ge p-MOS capacitors with HfTiON gate dielectric were fabricated by sputtering method. Pre-deposition fluorine plasma treatment and post-deposition fluorine plasma annealing were used to improve the electrical and reliability properties of Ge p-MOS capacitors. Experimental results showed that both methods could improve the interface quality with lower interface-state density, less frequency dispersion, and also enhance the reliability properties with smaller increases of oxide charge and gate leakage after high-field stressing. Compared with pre-deposition fluorine-plasma treatment, post-deposition fluorine plasma annealing achieved higher quality of high-k/Ge interface such as lower interface-state density, higher dielectric constant and lower stress-induced gate leakage current. By XPS and AFM analyses, the improvements should be due to the passivation effects of fluorine on oxygen vacancies, dangling bonds and the dielectric surface. © 2010 Elsevier Ltd. All rights reserved. | ||||||||
Persistent Identifier | http://hdl.handle.net/10722/155579 | ||||||||
ISSN | 2023 Impact Factor: 1.4 2023 SCImago Journal Rankings: 0.348 | ||||||||
ISI Accession Number ID |
Funding Information: The work is financially supported by the RGC of HKSAR, China (Project No. HKU 713308E), the University Development Fund (Nanotechnology Research Institute, 00600009) of the University of Hong Kong, and the National Natural Science Foundation of China (Grant No. 60776016). | ||||||||
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DC Field | Value | Language |
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dc.contributor.author | Li, CX | en_HK |
dc.contributor.author | Leung, CH | en_HK |
dc.contributor.author | Lai, PT | en_HK |
dc.contributor.author | Xu, JP | en_HK |
dc.date.accessioned | 2012-08-08T08:34:11Z | - |
dc.date.available | 2012-08-08T08:34:11Z | - |
dc.date.issued | 2010 | en_HK |
dc.identifier.citation | Solid-State Electronics, 2010, v. 54 n. 7, p. 675-679 | en_HK |
dc.identifier.issn | 0038-1101 | en_HK |
dc.identifier.uri | http://hdl.handle.net/10722/155579 | - |
dc.description.abstract | In this work, Ge p-MOS capacitors with HfTiON gate dielectric were fabricated by sputtering method. Pre-deposition fluorine plasma treatment and post-deposition fluorine plasma annealing were used to improve the electrical and reliability properties of Ge p-MOS capacitors. Experimental results showed that both methods could improve the interface quality with lower interface-state density, less frequency dispersion, and also enhance the reliability properties with smaller increases of oxide charge and gate leakage after high-field stressing. Compared with pre-deposition fluorine-plasma treatment, post-deposition fluorine plasma annealing achieved higher quality of high-k/Ge interface such as lower interface-state density, higher dielectric constant and lower stress-induced gate leakage current. By XPS and AFM analyses, the improvements should be due to the passivation effects of fluorine on oxygen vacancies, dangling bonds and the dielectric surface. © 2010 Elsevier Ltd. All rights reserved. | en_HK |
dc.language | eng | en_US |
dc.publisher | Pergamon. The Journal's web site is located at http://www.elsevier.com/locate/sse | en_HK |
dc.relation.ispartof | Solid-State Electronics | en_HK |
dc.subject | Fluorine passivation | en_HK |
dc.subject | Ge | en_HK |
dc.subject | High-k dielectric | en_HK |
dc.subject | MOS | en_HK |
dc.title | Effects of fluorine incorporation on the properties of Ge p-MOS capacitors with HfTiON dielectric | en_HK |
dc.type | Article | en_HK |
dc.identifier.email | Leung, CH: chleung@eee.hku.hk | en_HK |
dc.identifier.email | Lai, PT: laip@eee.hku.hk | en_HK |
dc.identifier.email | Xu, JP: jpxu@eee.hku.hk | en_HK |
dc.identifier.authority | Leung, CH=rp00146 | en_HK |
dc.identifier.authority | Lai, PT=rp00130 | en_HK |
dc.identifier.authority | Xu, JP=rp00197 | en_HK |
dc.description.nature | link_to_subscribed_fulltext | en_US |
dc.identifier.doi | 10.1016/j.sse.2010.03.002 | en_HK |
dc.identifier.scopus | eid_2-s2.0-77955312906 | en_HK |
dc.relation.references | http://www.scopus.com/mlt/select.url?eid=2-s2.0-77955312906&selection=ref&src=s&origin=recordpage | en_HK |
dc.identifier.volume | 54 | en_HK |
dc.identifier.issue | 7 | en_HK |
dc.identifier.spage | 675 | en_HK |
dc.identifier.epage | 679 | en_HK |
dc.identifier.isi | WOS:000278207400001 | - |
dc.publisher.place | United Kingdom | en_HK |
dc.relation.project | High-k Gate Dielectrics for High-Performance Germanium MISFET's | - |
dc.identifier.scopusauthorid | Li, CX=22034888200 | en_HK |
dc.identifier.scopusauthorid | Leung, CH=7402612415 | en_HK |
dc.identifier.scopusauthorid | Lai, PT=7202946460 | en_HK |
dc.identifier.scopusauthorid | Xu, JP=7407004696 | en_HK |
dc.identifier.citeulike | 6964508 | - |
dc.identifier.issnl | 0038-1101 | - |