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Article: Influence of natridation annealing of HfTiO on electrical properties of MOS device

TitleInfluence of natridation annealing of HfTiO on electrical properties of MOS device
Authors
KeywordsHfTiO
High-k gate dielectric
Natridation
Post-deposition annealing
Issue Date2008
Citation
Guti Dianzixue Yanjiu Yu Jinzhan/Research And Progress Of Solid State Electronics, 2008, v. 28 n. 3, p. 330-333 How to Cite?
AbstractHfTiO gate dielectric is first deposited on Si wafer through co-sputtering method. The influences of post-deposition annealing (PDA) in NO, N 2O, NH 3 and N 2 ambients on the electrical properties of MOS device are studied. It is found that NO-annealed sample exhibits good electrical properties, i.e. low interface-state density, low gate leakage current and high reliability due to formation of a SiO 2/Si-like interface of HfTiSiON interlayer. In addition, based on the relationship between the physical thickness change (ΔT ox) of gate dielectric (HfTiON/HfTi-SiON), the capacitance equivalent thickness changes (ΔCET) of MOS and the k value of HfTiON dielectric, the dielectric constant of HfTiON with PDA in NO ambient is found to be 28.
Persistent Identifierhttp://hdl.handle.net/10722/155495
ISSN
2015 SCImago Journal Rankings: 0.105
References

 

DC FieldValueLanguage
dc.contributor.authorJi, Fen_HK
dc.contributor.authorXu, Jen_HK
dc.contributor.authorZhang, Hen_HK
dc.contributor.authorLai, Pen_HK
dc.contributor.authorLi, Cen_HK
dc.contributor.authorGuan, Jen_HK
dc.date.accessioned2012-08-08T08:33:46Z-
dc.date.available2012-08-08T08:33:46Z-
dc.date.issued2008en_HK
dc.identifier.citationGuti Dianzixue Yanjiu Yu Jinzhan/Research And Progress Of Solid State Electronics, 2008, v. 28 n. 3, p. 330-333en_HK
dc.identifier.issn1000-3819en_HK
dc.identifier.urihttp://hdl.handle.net/10722/155495-
dc.description.abstractHfTiO gate dielectric is first deposited on Si wafer through co-sputtering method. The influences of post-deposition annealing (PDA) in NO, N 2O, NH 3 and N 2 ambients on the electrical properties of MOS device are studied. It is found that NO-annealed sample exhibits good electrical properties, i.e. low interface-state density, low gate leakage current and high reliability due to formation of a SiO 2/Si-like interface of HfTiSiON interlayer. In addition, based on the relationship between the physical thickness change (ΔT ox) of gate dielectric (HfTiON/HfTi-SiON), the capacitance equivalent thickness changes (ΔCET) of MOS and the k value of HfTiON dielectric, the dielectric constant of HfTiON with PDA in NO ambient is found to be 28.en_HK
dc.languageengen_US
dc.relation.ispartofGuti Dianzixue Yanjiu Yu Jinzhan/Research and Progress of Solid State Electronicsen_HK
dc.subjectHfTiOen_HK
dc.subjectHigh-k gate dielectricen_HK
dc.subjectNatridationen_HK
dc.subjectPost-deposition annealingen_HK
dc.titleInfluence of natridation annealing of HfTiO on electrical properties of MOS deviceen_HK
dc.typeArticleen_HK
dc.identifier.emailXu, J: jpxu@eee.hku.hken_HK
dc.identifier.emailLai, P: laip@eee.hku.hken_HK
dc.identifier.authorityXu, J=rp00197en_HK
dc.identifier.authorityLai, P=rp00130en_HK
dc.description.naturelink_to_subscribed_fulltexten_US
dc.identifier.scopuseid_2-s2.0-54049150873en_HK
dc.relation.referenceshttp://www.scopus.com/mlt/select.url?eid=2-s2.0-54049150873&selection=ref&src=s&origin=recordpageen_HK
dc.identifier.volume28en_HK
dc.identifier.issue3en_HK
dc.identifier.spage330en_HK
dc.identifier.epage333en_HK
dc.identifier.scopusauthoridJi, F=8238553900en_HK
dc.identifier.scopusauthoridXu, J=7407004696en_HK
dc.identifier.scopusauthoridZhang, H=8516600700en_HK
dc.identifier.scopusauthoridLai, P=7202946460en_HK
dc.identifier.scopusauthoridLi, C=22034888200en_HK
dc.identifier.scopusauthoridGuan, J=7201449685en_HK

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