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Article: 2D threshold-voltage model for high-k gate-dielectric MOSFETs

Title2D threshold-voltage model for high-k gate-dielectric MOSFETs
Authors
KeywordsFringing Field
High-K Gate Dielectric
Mosfet
Short-Channel Effect
Threshold Voltage
Issue Date2006
Citation
Pan Tao Ti Hsueh Pao/Chinese Journal Of Semiconductors, 2006, v. 27 n. 10, p. 1725-1731 How to Cite?
AbstractNew boundary conditions and a 2D potential distribution along the channel of a high-k gate-dielectric MOSFET, including both the gate dielectric material region and the depletion region, are given. Based on this distribution, a 2D threshold-voltage model with the fringing-field and short-channel effects is developed for a high-k gate-dielectric MOSFET. The model agrees well with experimental data and a quasi 2D model, and is even more accurate than the quasi 2D model at higher drain voltages. Factors affecting the threshold behavior of the high-k gate-dielectric MOSFET are discussed in detail.
Persistent Identifierhttp://hdl.handle.net/10722/155347
ISSN
2011 SCImago Journal Rankings: 0.140
References

 

DC FieldValueLanguage
dc.contributor.authorJi, Fen_US
dc.contributor.authorXu, Jen_US
dc.contributor.authorLai, PTen_US
dc.contributor.authorChen, Wen_US
dc.contributor.authorLi, Yen_US
dc.date.accessioned2012-08-08T08:33:00Z-
dc.date.available2012-08-08T08:33:00Z-
dc.date.issued2006en_US
dc.identifier.citationPan Tao Ti Hsueh Pao/Chinese Journal Of Semiconductors, 2006, v. 27 n. 10, p. 1725-1731en_US
dc.identifier.issn0253-4177en_US
dc.identifier.urihttp://hdl.handle.net/10722/155347-
dc.description.abstractNew boundary conditions and a 2D potential distribution along the channel of a high-k gate-dielectric MOSFET, including both the gate dielectric material region and the depletion region, are given. Based on this distribution, a 2D threshold-voltage model with the fringing-field and short-channel effects is developed for a high-k gate-dielectric MOSFET. The model agrees well with experimental data and a quasi 2D model, and is even more accurate than the quasi 2D model at higher drain voltages. Factors affecting the threshold behavior of the high-k gate-dielectric MOSFET are discussed in detail.en_US
dc.languageengen_US
dc.relation.ispartofPan Tao Ti Hsueh Pao/Chinese Journal of Semiconductorsen_US
dc.subjectFringing Fielden_US
dc.subjectHigh-K Gate Dielectricen_US
dc.subjectMosfeten_US
dc.subjectShort-Channel Effecten_US
dc.subjectThreshold Voltageen_US
dc.title2D threshold-voltage model for high-k gate-dielectric MOSFETsen_US
dc.typeArticleen_US
dc.identifier.emailLai, PT:laip@eee.hku.hken_US
dc.identifier.authorityLai, PT=rp00130en_US
dc.description.naturelink_to_subscribed_fulltexten_US
dc.identifier.scopuseid_2-s2.0-33751577927en_US
dc.relation.referenceshttp://www.scopus.com/mlt/select.url?eid=2-s2.0-33751577927&selection=ref&src=s&origin=recordpageen_US
dc.identifier.volume27en_US
dc.identifier.issue10en_US
dc.identifier.spage1725en_US
dc.identifier.epage1731en_US
dc.publisher.placeChinaen_US
dc.identifier.scopusauthoridJi, F=8238553900en_US
dc.identifier.scopusauthoridXu, J=7407003499en_US
dc.identifier.scopusauthoridLai, PT=7202946460en_US
dc.identifier.scopusauthoridChen, W=15119171500en_US
dc.identifier.scopusauthoridLi, Y=8704252400en_US

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