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Article: Closed-form delay expression for digital BiCMOS circuits with high-injection effects

TitleClosed-form delay expression for digital BiCMOS circuits with high-injection effects
Authors
Issue Date1994
Citation
Ieee Journal Of Solid-State Circuits, 1994, v. 29 n. 5, p. 640-643 How to Cite?
AbstractA non-iterative formula is derived for calculating the delay time of digital BiCMOS circuits with their bipolar transistors operating in high-current regime. Effects such as the base transit-time increase of minority carriers and the decrease of the current gain of the bipolar transistors are all incorporated in the model. This model can be used to investigate the effects of most device parameters such as transistor sizes and external loading on the performance of the circuits without resorting to any iterative procedures. This simplified model compares well with the original model to 10% over a wide range of operating conditions, and is especially accurate for situations where base widening affects the bipolar transistors.
Persistent Identifierhttp://hdl.handle.net/10722/155001
ISSN
2015 Impact Factor: 3.299
2015 SCImago Journal Rankings: 3.278
ISI Accession Number ID

 

DC FieldValueLanguage
dc.contributor.authorLai, PTen_US
dc.contributor.authorCheng, YCen_US
dc.date.accessioned2012-08-08T08:31:28Z-
dc.date.available2012-08-08T08:31:28Z-
dc.date.issued1994en_US
dc.identifier.citationIeee Journal Of Solid-State Circuits, 1994, v. 29 n. 5, p. 640-643en_US
dc.identifier.issn0018-9200en_US
dc.identifier.urihttp://hdl.handle.net/10722/155001-
dc.description.abstractA non-iterative formula is derived for calculating the delay time of digital BiCMOS circuits with their bipolar transistors operating in high-current regime. Effects such as the base transit-time increase of minority carriers and the decrease of the current gain of the bipolar transistors are all incorporated in the model. This model can be used to investigate the effects of most device parameters such as transistor sizes and external loading on the performance of the circuits without resorting to any iterative procedures. This simplified model compares well with the original model to 10% over a wide range of operating conditions, and is especially accurate for situations where base widening affects the bipolar transistors.en_US
dc.languageengen_US
dc.relation.ispartofIEEE Journal of Solid-State Circuitsen_US
dc.titleClosed-form delay expression for digital BiCMOS circuits with high-injection effectsen_US
dc.typeArticleen_US
dc.identifier.emailLai, PT:laip@eee.hku.hken_US
dc.identifier.authorityLai, PT=rp00130en_US
dc.description.naturelink_to_subscribed_fulltexten_US
dc.identifier.doi10.1109/4.284720en_US
dc.identifier.scopuseid_2-s2.0-0028433565en_US
dc.identifier.volume29en_US
dc.identifier.issue5en_US
dc.identifier.spage640en_US
dc.identifier.epage643en_US
dc.identifier.isiWOS:A1994NM77500015-
dc.publisher.placeUnited Statesen_US
dc.identifier.scopusauthoridLai, PT=7202946460en_US
dc.identifier.scopusauthoridCheng, YC=27167728600en_US

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