Scaling the silicon bipolar transistor for sub-100-ps ECL circuit operation at liquid nitrogen temperature

Abstract

A two-dimensional device simulator was used to examine the various profile design strategies for silicon bipolar transistors operating at liquid-nitrogen temperatures. Special emphasis was placed on the scaling tradeoffs of these design approaches. It is concluded that a relaxed scaling technique based on the maintenance of constant base Gummel number with a slight decrease in emitter doping level probably offers the best overall low-temperature design strategy for scaled double-polysilicon devices. To verify these calculations, devices with 0.8-μm lithography were fabricated using this design scheme. Transistors were found to be reasonably ideal at low temperatures and had adequate current gain for most digital applications. Unloaded ECL ring oscillators operated at sub-100-ps speeds at liquid-nitrogen temperatures. Simulations based on measured data indicate that sub-150-ps loaded ECL delays are achievable at about 4-mW power at 87 K if the circuit logic swing is reduced to 300 mV. These data suggest that conventionally designed silicon bipolar transistors are attractive candidates for very-high-performance applications in the low-temperature environment.