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Article: Scaling the silicon bipolar transistor for sub-100-ps ECL circuit operation at liquid nitrogen temperature

TitleScaling the silicon bipolar transistor for sub-100-ps ECL circuit operation at liquid nitrogen temperature
Authors
Issue Date1990
PublisherI E E E. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=16
Citation
Ieee Transactions On Electron Devices, 1990, v. 37 n. 3 pt 1, p. 680-691 How to Cite?
AbstractA two-dimensional device simulator was used to examine the various profile design strategies for silicon bipolar transistors operating at liquid-nitrogen temperatures. Special emphasis was placed on the scaling tradeoffs of these design approaches. It is concluded that a relaxed scaling technique based on the maintenance of constant base Gummel number with a slight decrease in emitter doping level probably offers the best overall low-temperature design strategy for scaled double-polysilicon devices. To verify these calculations, devices with 0.8-μm lithography were fabricated using this design scheme. Transistors were found to be reasonably ideal at low temperatures and had adequate current gain for most digital applications. Unloaded ECL ring oscillators operated at sub-100-ps speeds at liquid-nitrogen temperatures. Simulations based on measured data indicate that sub-150-ps loaded ECL delays are achievable at about 4-mW power at 87 K if the circuit logic swing is reduced to 300 mV. These data suggest that conventionally designed silicon bipolar transistors are attractive candidates for very-high-performance applications in the low-temperature environment.
Persistent Identifierhttp://hdl.handle.net/10722/154905
ISSN
2015 Impact Factor: 2.207
2015 SCImago Journal Rankings: 1.436
ISI Accession Number ID

 

DC FieldValueLanguage
dc.contributor.authorCressler, John Den_US
dc.contributor.authorChen, TzeChiangen_US
dc.contributor.authorWarnock, James Den_US
dc.contributor.authorTang, Denny DuanLeeen_US
dc.contributor.authorYang, Edward Sen_US
dc.date.accessioned2012-08-08T08:31:06Z-
dc.date.available2012-08-08T08:31:06Z-
dc.date.issued1990en_US
dc.identifier.citationIeee Transactions On Electron Devices, 1990, v. 37 n. 3 pt 1, p. 680-691en_US
dc.identifier.issn0018-9383en_US
dc.identifier.urihttp://hdl.handle.net/10722/154905-
dc.description.abstractA two-dimensional device simulator was used to examine the various profile design strategies for silicon bipolar transistors operating at liquid-nitrogen temperatures. Special emphasis was placed on the scaling tradeoffs of these design approaches. It is concluded that a relaxed scaling technique based on the maintenance of constant base Gummel number with a slight decrease in emitter doping level probably offers the best overall low-temperature design strategy for scaled double-polysilicon devices. To verify these calculations, devices with 0.8-μm lithography were fabricated using this design scheme. Transistors were found to be reasonably ideal at low temperatures and had adequate current gain for most digital applications. Unloaded ECL ring oscillators operated at sub-100-ps speeds at liquid-nitrogen temperatures. Simulations based on measured data indicate that sub-150-ps loaded ECL delays are achievable at about 4-mW power at 87 K if the circuit logic swing is reduced to 300 mV. These data suggest that conventionally designed silicon bipolar transistors are attractive candidates for very-high-performance applications in the low-temperature environment.en_US
dc.languageengen_US
dc.publisherI E E E. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=16en_US
dc.relation.ispartofIEEE Transactions on Electron Devicesen_US
dc.titleScaling the silicon bipolar transistor for sub-100-ps ECL circuit operation at liquid nitrogen temperatureen_US
dc.typeArticleen_US
dc.identifier.emailYang, Edward S:esyang@hkueee.hku.hken_US
dc.identifier.authorityYang, Edward S=rp00199en_US
dc.description.naturelink_to_subscribed_fulltexten_US
dc.identifier.doi10.1109/16.47773en_US
dc.identifier.scopuseid_2-s2.0-0025401961en_US
dc.identifier.volume37en_US
dc.identifier.issue3 pt 1en_US
dc.identifier.spage680en_US
dc.identifier.epage691en_US
dc.identifier.isiWOS:A1990CR84400022-
dc.publisher.placeUnited Statesen_US
dc.identifier.scopusauthoridCressler, John D=7006864898en_US
dc.identifier.scopusauthoridChen, TzeChiang=7405544936en_US
dc.identifier.scopusauthoridWarnock, James D=7006064399en_US
dc.identifier.scopusauthoridTang, Denny DuanLee=7401987074en_US
dc.identifier.scopusauthoridYang, Edward S=7202021229en_US

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