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Article: Self-aligned bipolar transistor using double thermal oxidation

TitleSelf-aligned bipolar transistor using double thermal oxidation
Authors
KeywordsBipolar devices
Semiconductor devices and materials
Transistors
Issue Date1988
PublisherThe Institution of Engineering and Technology. The Journal's web site is located at http://www.ieedl.org/EL
Citation
Electronics Letters, 1988, v. 24 n. 21, p. 1343-1345 How to Cite?
AbstractA novel process is proposed to self-align the emitter and extrinsic base in a bipolar transistor. The process involves the use of double thermal oxidation and RIE to create a steep oxide emitter sidewall. The method avoids the potential problems of LPCVD oxide and can remove the residual poly on the extrinsic base, both of which lead to base-emitter shorts. It also eliminates the need for growth of adhesion oxide and annealing of LPCVD oxide. The devices thus fabricated exhibit a high current gain of 130 and high punch-through voltage of 20 V.
Persistent Identifierhttp://hdl.handle.net/10722/154878
ISSN
2023 Impact Factor: 0.7
2023 SCImago Journal Rankings: 0.323
ISI Accession Number ID

 

DC FieldValueLanguage
dc.contributor.authorLai, PTen_US
dc.contributor.authorKassam, Aen_US
dc.contributor.authorSalama, CATen_US
dc.date.accessioned2012-08-08T08:31:00Z-
dc.date.available2012-08-08T08:31:00Z-
dc.date.issued1988en_US
dc.identifier.citationElectronics Letters, 1988, v. 24 n. 21, p. 1343-1345en_US
dc.identifier.issn0013-5194en_US
dc.identifier.urihttp://hdl.handle.net/10722/154878-
dc.description.abstractA novel process is proposed to self-align the emitter and extrinsic base in a bipolar transistor. The process involves the use of double thermal oxidation and RIE to create a steep oxide emitter sidewall. The method avoids the potential problems of LPCVD oxide and can remove the residual poly on the extrinsic base, both of which lead to base-emitter shorts. It also eliminates the need for growth of adhesion oxide and annealing of LPCVD oxide. The devices thus fabricated exhibit a high current gain of 130 and high punch-through voltage of 20 V.en_US
dc.languageengen_US
dc.publisherThe Institution of Engineering and Technology. The Journal's web site is located at http://www.ieedl.org/ELen_US
dc.relation.ispartofElectronics Lettersen_US
dc.subjectBipolar devices-
dc.subjectSemiconductor devices and materials-
dc.subjectTransistors-
dc.titleSelf-aligned bipolar transistor using double thermal oxidationen_US
dc.typeArticleen_US
dc.identifier.emailLai, PT:laip@eee.hku.hken_US
dc.identifier.authorityLai, PT=rp00130en_US
dc.description.naturelink_to_subscribed_fulltexten_US
dc.identifier.scopuseid_2-s2.0-0024090050en_US
dc.identifier.volume24en_US
dc.identifier.issue21en_US
dc.identifier.spage1343en_US
dc.identifier.epage1345en_US
dc.identifier.isiWOS:A1988Q683400031-
dc.publisher.placeUnited Kingdomen_US
dc.identifier.scopusauthoridLai, PT=7202946460en_US
dc.identifier.scopusauthoridKassam, A=36941939400en_US
dc.identifier.scopusauthoridSalama, CAT=7004594704en_US
dc.identifier.issnl0013-5194-

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