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Conference Paper: Fast asynchronous algorithm for linear feature extraction on IBM SP-2

TitleFast asynchronous algorithm for linear feature extraction on IBM SP-2
Authors
Issue Date1995
Citation
Computer Architectures For Machine Perception, Proceedings (Camp), 1995, p. 294-301 How to Cite?
AbstractIn this paper, we present a fast parallel implementation of linear feature extraction on IBM SP-2. We first analyze the machine features and the problem characteristics to understand the overheads in parallel solutions to the problem. Based on these, we propose an asynchronous algorithm which enhances processor utilization and overlaps communication with computation by maintaining algorithmic threads in each processing node. Our implementation shows that, given a 512 × 512 image, the linear feature extraction task can be performed in 0.065 seconds on a SP-2 having 64 processing nodes. A serial implementation takes 3.45 seconds on a single processing node of SP-2. A previous implementation on CM-5 takes 0.1 second on a partition of 512 processing nodes. Experimental results on various sizes of images using 4, 8, 16, 32, and 64 processing nodes are also reported.
Persistent Identifierhttp://hdl.handle.net/10722/151812

 

DC FieldValueLanguage
dc.contributor.authorChung, Yongwhaen_US
dc.contributor.authorPrasanna, Viktor Ken_US
dc.contributor.authorWang, ChoLien_US
dc.date.accessioned2012-06-26T06:29:48Z-
dc.date.available2012-06-26T06:29:48Z-
dc.date.issued1995en_US
dc.identifier.citationComputer Architectures For Machine Perception, Proceedings (Camp), 1995, p. 294-301en_US
dc.identifier.urihttp://hdl.handle.net/10722/151812-
dc.description.abstractIn this paper, we present a fast parallel implementation of linear feature extraction on IBM SP-2. We first analyze the machine features and the problem characteristics to understand the overheads in parallel solutions to the problem. Based on these, we propose an asynchronous algorithm which enhances processor utilization and overlaps communication with computation by maintaining algorithmic threads in each processing node. Our implementation shows that, given a 512 × 512 image, the linear feature extraction task can be performed in 0.065 seconds on a SP-2 having 64 processing nodes. A serial implementation takes 3.45 seconds on a single processing node of SP-2. A previous implementation on CM-5 takes 0.1 second on a partition of 512 processing nodes. Experimental results on various sizes of images using 4, 8, 16, 32, and 64 processing nodes are also reported.en_US
dc.languageengen_US
dc.relation.ispartofComputer Architectures for Machine Perception, Proceedings (CAMP)en_US
dc.titleFast asynchronous algorithm for linear feature extraction on IBM SP-2en_US
dc.typeConference_Paperen_US
dc.identifier.emailWang, ChoLi:clwang@cs.hku.hken_US
dc.identifier.authorityWang, ChoLi=rp00183en_US
dc.description.naturelink_to_subscribed_fulltexten_US
dc.identifier.scopuseid_2-s2.0-0029528797en_US
dc.identifier.spage294en_US
dc.identifier.epage301en_US
dc.identifier.scopusauthoridChung, Yongwha=7404387981en_US
dc.identifier.scopusauthoridPrasanna, Viktor K=7005057102en_US
dc.identifier.scopusauthoridWang, ChoLi=7501646188en_US

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