File Download
  Links for fulltext
     (May Require Subscription)
Supplementary

Conference Paper: TrC-MC: decentralized software transactional memory for multi-multicore computers

TitleTrC-MC: decentralized software transactional memory for multi-multicore computers
Authors
KeywordsAlgorithm
Cache contention
Multicore
Software transactional memory
Issue Date2011
PublisherIEEE.
Citation
The 17th IEEE International Conference on Parallel and Distributed Systems (ICPADS 2011), Tainan, Taiwan, 7-9 December 2011. In Proceedings of the 17th IEEE ICPADS, 2011, p. 292-299 How to Cite?
AbstractTo achieve single-lock atomicity in software transactional memory systems, the commit procedure often goes through a common clock variable. When there are frequent transactional commits, clock sharing becomes inefficient. Tremendous cache contention takes place between the processors and the computing throughput no longer scales with processor count. Therefore, traditional transactional memories are unable to accelerate applications with frequent commits regardless of thread count. While systems with decentralized data structures have better performance on these applications, we argue they are incomplete as they create much more aborts than traditional transactional systems. In this paper we apply two design changes, namely zone partitioning and timestamp extension, to optimize an existing decentralized algorithm. We prove the correctness and evaluate some benchmark programs with frequent transactional commits. We find it as much as several times faster than the state-of-the-art software transactional memory system. We have also reduced the abort rate of the system to an acceptable level.
Persistent Identifierhttp://hdl.handle.net/10722/144627
ISSN
ISI Accession Number ID

 

DC FieldValueLanguage
dc.contributor.authorChan, Ken_US
dc.contributor.authorWang, CLen_US
dc.date.accessioned2012-02-03T06:16:58Z-
dc.date.available2012-02-03T06:16:58Z-
dc.date.issued2011en_US
dc.identifier.citationThe 17th IEEE International Conference on Parallel and Distributed Systems (ICPADS 2011), Tainan, Taiwan, 7-9 December 2011. In Proceedings of the 17th IEEE ICPADS, 2011, p. 292-299en_US
dc.identifier.issn1521-9097-
dc.identifier.urihttp://hdl.handle.net/10722/144627-
dc.description.abstractTo achieve single-lock atomicity in software transactional memory systems, the commit procedure often goes through a common clock variable. When there are frequent transactional commits, clock sharing becomes inefficient. Tremendous cache contention takes place between the processors and the computing throughput no longer scales with processor count. Therefore, traditional transactional memories are unable to accelerate applications with frequent commits regardless of thread count. While systems with decentralized data structures have better performance on these applications, we argue they are incomplete as they create much more aborts than traditional transactional systems. In this paper we apply two design changes, namely zone partitioning and timestamp extension, to optimize an existing decentralized algorithm. We prove the correctness and evaluate some benchmark programs with frequent transactional commits. We find it as much as several times faster than the state-of-the-art software transactional memory system. We have also reduced the abort rate of the system to an acceptable level.-
dc.languageengen_US
dc.publisherIEEE.en_US
dc.relation.ispartofProceedings of the International Conference on Parallel and Distributed Systemsen_US
dc.rightsCreative Commons: Attribution 3.0 Hong Kong License-
dc.rightsInternational Conference on Parallel and Distributed Systems Proceedings. Copyright © IEEE.-
dc.rights©2011 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.-
dc.subjectAlgorithm-
dc.subjectCache contention-
dc.subjectMulticore-
dc.subjectSoftware transactional memory-
dc.titleTrC-MC: decentralized software transactional memory for multi-multicore computersen_US
dc.typeConference_Paperen_US
dc.identifier.emailChan, K: kchan@cs.hku.hken_US
dc.identifier.emailWang, CL: clwang@cs.hku.hk-
dc.identifier.authorityWang, CL=rp00183en_US
dc.description.naturepublished_or_final_version-
dc.identifier.doi10.1109/ICPADS.2011.144-
dc.identifier.scopuseid_2-s2.0-84863080401-
dc.identifier.hkuros198270en_US
dc.identifier.spage292-
dc.identifier.epage299-
dc.identifier.isiWOS:000299395900038-
dc.description.otherThe 17th IEEE International Conference on Parallel and Distributed Systems (ICPADS 2011), Tainan, Taiwan, 7-9 December 2011. In Proceedings of the 17th IEEE ICPADS, 2011, p. 292-299-

Export via OAI-PMH Interface in XML Formats


OR


Export to Other Non-XML Formats