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Conference Paper: Design of 5 th-order analog predistorter

TitleDesign of 5 th-order analog predistorter
Authors
Sun, XLCheung, SWYuk, TI
KeywordsAdjacent channel power ratio
Center frequency
Hardware implementations
Intermodulation-distortion products
Predistorters
Issue Date2010
PublisherIEEE.
Citation
The 2010 IEEE Region 10 International Conference (TENCON 2010), Fukuoka, Japan, 21-24 November 2010. In TENCON (IEEE Region 10 Conference) Proceedings, 2010, p. 876-879 How to Cite?
DOI: http://dx.doi.org/10.1109/TENCON.2010.5686562
AbstractThis paper presents the design of a 5th-order analog predistorter to suppress the 3rd-and 5th-order intermodulation distortion products (EVTDP3 and EVTDP5) at the output of a base-station power amplifiers (PAs). The predistorter consists of two mixers: one mixer generating the 3rd-order intermodulation (IM3) products and another mixer of same configuration generating the 5th-order intermodulation (IM5) products using the IM3 products generated by the other mixer, thus simplifying the design and hardware implementation. The predistorter is implemented and tested using two-tone and the CDMA (IS-95) signals at 2.2GHz in a practical 10W-PA. The two-tone test results show that the proposed predistorter can suppress the IMDP3 and IMDP5 by 17dB and lldB, respectively. For the CDMA (IS-95) test, results show that the predistorter can improve the adjacent channel power ratio (ACPR) by 10 dB at ± 887 kHz from the center frequency. © 2010 IEEE.
Persistent Identifierhttp://hdl.handle.net/10722/140284
ISBN
9781424468904
ISSN
0886-1420
ISI Accession Number ID
WOS:000287978600144
References
References in Scopus

 

DC FieldValueLanguage
dc.contributor.authorSun, XLen_HK
dc.contributor.authorCheung, SWen_HK
dc.contributor.authorYuk, TIen_HK
dc.date.accessioned2011-09-23T06:09:34Z-
dc.date.available2011-09-23T06:09:34Z-
dc.date.issued2010en_HK
dc.identifier.citationThe 2010 IEEE Region 10 International Conference (TENCON 2010), Fukuoka, Japan, 21-24 November 2010. In TENCON (IEEE Region 10 Conference) Proceedings, 2010, p. 876-879en_HK
dc.identifier.isbn9781424468904-
dc.identifier.issn0886-1420-
dc.identifier.urihttp://hdl.handle.net/10722/140284-
dc.description.abstractThis paper presents the design of a 5<sup>th</sup>-order analog predistorter to suppress the 3<sup>rd</sup>-and 5<sup>th</sup>-order intermodulation distortion products (EVTDP3 and EVTDP5) at the output of a base-station power amplifiers (PAs). The predistorter consists of two mixers: one mixer generating the 3<sup>rd</sup>-order intermodulation (IM3) products and another mixer of same configuration generating the 5<sup>th</sup>-order intermodulation (IM5) products using the IM3 products generated by the other mixer, thus simplifying the design and hardware implementation. The predistorter is implemented and tested using two-tone and the CDMA (IS-95) signals at 2.2GHz in a practical 10W-PA. The two-tone test results show that the proposed predistorter can suppress the IMDP3 and IMDP5 by 17dB and lldB, respectively. For the CDMA (IS-95) test, results show that the predistorter can improve the adjacent channel power ratio (ACPR) by 10 dB at ± 887 kHz from the center frequency. © 2010 IEEE.-
dc.languageengen_US
dc.publisherIEEE.-
dc.relation.ispartofIEEE Region 10 Annual International Conference, Proceedings/TENCONen_HK
dc.rights©2010 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.-
dc.subjectAdjacent channel power ratio-
dc.subjectCenter frequency-
dc.subjectHardware implementations-
dc.subjectIntermodulation-distortion products-
dc.subjectPredistorters-
dc.titleDesign of 5 th-order analog predistorteren_HK
dc.typeConference_Paperen_HK
dc.identifier.openurlhttp://library.hku.hk:4550/resserv?sid=HKU:IR&issn=0886-1420&volume=&spage=876&epage=879&date=2010&atitle=Design+of+5th-order+analog+predistorter-
dc.identifier.emailCheung, SW:swcheung@eee.hku.hken_HK
dc.identifier.emailYuk, TI:tiyuk@eee.hku.hken_HK
dc.identifier.authorityCheung, SW=rp00102en_HK
dc.identifier.authorityYuk, TI=rp00210en_HK
dc.description.naturepublished_or_final_version-
dc.identifier.doi10.1109/TENCON.2010.5686562en_HK
dc.identifier.scopuseid_2-s2.0-79951596721en_HK
dc.identifier.hkuros195877en_US
dc.relation.referenceshttp://www.scopus.com/mlt/select.url?eid=2-s2.0-79951596721&selection=ref&src=s&origin=recordpageen_HK
dc.identifier.spage876en_HK
dc.identifier.epage879en_HK
dc.identifier.isiWOS:000287978600144-
dc.description.otherThe 2010 IEEE Region 10 International Conference (TENCON 2010), Fukuoka, Japan, 21-24 November 2010. In TENCON (IEEE Region 10 Conference) Proceedings, 2010, p. 876-879-
dc.identifier.scopusauthoridSun, XL=36926307400en_HK
dc.identifier.scopusauthoridCheung, SW=7202472784en_HK
dc.identifier.scopusauthoridYuk, TI=6603685705en_HK
dc.identifier.issnl0886-1420-

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