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Conference Paper: VLSI macromodeling and signal integrity analysis via digital signal processing techniques

TitleVLSI macromodeling and signal integrity analysis via digital signal processing techniques
Authors
KeywordsSignal/power integrity
Interconnect/package modeling and simulation
Digital signal processing
Discrete-time domain
Convergence problems
Issue Date2011
Citation
The 2011 International MultiConference of Engineers and Computer Scientists (IMECS 2011), Hong Kong, 16-18 March 2011. In Proceedings of IMECS, 2011, v. 2, p. 1031-1032 How to Cite?
AbstractLinear macromodeling has been applied to high-frequency circuit simulations to accelerate the global interconnect system simulation process. By approximating tabulated structure response data, reduced macromodels can be generated. However, conventional macromodeling approaches suffer from numerical robustness and convergence problems. This paper aims to apply digital signal processing techniques to facilitate the macromodeling process. Besides improving the existing widely adopted framework (called VFz) through introducing a robust discrete-time domain (z-domain) computation, alternative macromodeling methodology (called VISA) has also been developed, which significantly simplifies the computation procedure. Furthermore, universal pre-processing technique (frequency warping) is introduced for a numerically favorable computation of the macromodeling process. These techniques have been shown to significantly improve the robustness and convergence of the modeling process.
Persistent Identifierhttp://hdl.handle.net/10722/140244
ISBN

 

DC FieldValueLanguage
dc.contributor.authorLei, CUen_US
dc.contributor.authorMan, KLen_US
dc.contributor.authorWu, Yen_US
dc.date.accessioned2011-09-23T06:09:16Z-
dc.date.available2011-09-23T06:09:16Z-
dc.date.issued2011en_US
dc.identifier.citationThe 2011 International MultiConference of Engineers and Computer Scientists (IMECS 2011), Hong Kong, 16-18 March 2011. In Proceedings of IMECS, 2011, v. 2, p. 1031-1032en_US
dc.identifier.isbn978-988-19251-2-1-
dc.identifier.urihttp://hdl.handle.net/10722/140244-
dc.description.abstractLinear macromodeling has been applied to high-frequency circuit simulations to accelerate the global interconnect system simulation process. By approximating tabulated structure response data, reduced macromodels can be generated. However, conventional macromodeling approaches suffer from numerical robustness and convergence problems. This paper aims to apply digital signal processing techniques to facilitate the macromodeling process. Besides improving the existing widely adopted framework (called VFz) through introducing a robust discrete-time domain (z-domain) computation, alternative macromodeling methodology (called VISA) has also been developed, which significantly simplifies the computation procedure. Furthermore, universal pre-processing technique (frequency warping) is introduced for a numerically favorable computation of the macromodeling process. These techniques have been shown to significantly improve the robustness and convergence of the modeling process.-
dc.languageengen_US
dc.relation.ispartofProceedings of the International MultiConference of Engineers and Computer Scientists, IMECS 2011en_US
dc.rightsCreative Commons: Attribution 3.0 Hong Kong License-
dc.subjectSignal/power integrity-
dc.subjectInterconnect/package modeling and simulation-
dc.subjectDigital signal processing-
dc.subjectDiscrete-time domain-
dc.subjectConvergence problems-
dc.titleVLSI macromodeling and signal integrity analysis via digital signal processing techniquesen_US
dc.typeConference_Paperen_US
dc.identifier.emailLei, CU: culei@hku.hk-
dc.description.naturepostprint-
dc.identifier.scopuseid_2-s2.0-79960616750-
dc.identifier.hkuros194865en_US
dc.identifier.volume2-
dc.identifier.spage1031en_US
dc.identifier.epage1032en_US
dc.description.otherThe 2011 International MultiConference of Engineers and Computer Scientists (IMECS 2011), Hong Kong, 16-18 March 2011. In Proceedings of IMECS, 2011, v. 2, p. 1031-1032-

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