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Article: A thermal simulation process based on electrical modeling for complex interconnect, packaging, and 3DI structures

TitleA thermal simulation process based on electrical modeling for complex interconnect, packaging, and 3DI structures
Authors
KeywordsEquivalent thermal conductivity
finite difference method
interconnects
Joule heating
packaging
resistance solver
thermal analysis
three-dimensional integration (3DI)
very-large-scale integration (VLSI)
Issue Date2010
PublisherIEEE.
Citation
Ieee Transactions On Advanced Packaging, 2010, v. 33 n. 4, p. 777-786 How to Cite?
AbstractTo reduce the product development time and achieve first-pass silicon success, fast and accurate estimation of very-large-scale integration (VLSI) interconnect, packaging and 3DI (3D integrated circuits) thermal profiles has become important. Present commercial thermal analysis tools are incapable of handling very complex structures and have integration difficulties with existing design flows. Many analytical thermal models, which could provide fast estimates, are either too specific or oversimplified. This paper highlights a methodology, which exploits electrical resistance solvers for thermal simulation, to allow acquisition of thermal profiles of complex structures with good accuracy and reasonable computation cost. Moreover, a novel accurate closed-form thermal model is developed. The model allows an isotropic or anisotropic equivalent medium to replace the noncritical back-end-of-line (BEOL) regions so that the simulation complexity is dramatically reduced. Using these techniques, this paper introduces the thermal modeling of practical complex VLSI structures to facilitate thermal guideline generation. It also demonstrates the benefits of the proposed anisotropic equivalent medium approximation for real VLSI structures in terms of the accuracy and computational cost. © 2006 IEEE.
Persistent Identifierhttp://hdl.handle.net/10722/139279
ISSN
2010 Impact Factor: 1.339
2013 SCImago Journal Rankings: 0.599
ISI Accession Number ID
Funding AgencyGrant Number
IBM
University of Hong Kong
Funding Information:

Manuscript received January 05, 2010; revised June 25, 2010; accepted July 18, 2010. Date of current version January 07, 2011. The work was supported by IBM Research, IBM EDA, by an IBM Faculty Award to Prof. K. Banerjee at UC Santa Barbara, and by the University of Hong Kong. This work was recommended for publication by Associate Editor D. Jiao upon evaluation of the reviewers comments.

References

 

DC FieldValueLanguage
dc.contributor.authorJiang, Len_HK
dc.contributor.authorXu, Cen_HK
dc.contributor.authorRubin, BJen_HK
dc.contributor.authorWeger, AJen_HK
dc.contributor.authorDeutsch, Aen_HK
dc.contributor.authorSmith, Hen_HK
dc.contributor.authorCaron, Aen_HK
dc.contributor.authorBanerjee, Ken_HK
dc.date.accessioned2011-09-23T05:47:51Z-
dc.date.available2011-09-23T05:47:51Z-
dc.date.issued2010en_HK
dc.identifier.citationIeee Transactions On Advanced Packaging, 2010, v. 33 n. 4, p. 777-786en_HK
dc.identifier.issn1521-3323en_HK
dc.identifier.urihttp://hdl.handle.net/10722/139279-
dc.description.abstractTo reduce the product development time and achieve first-pass silicon success, fast and accurate estimation of very-large-scale integration (VLSI) interconnect, packaging and 3DI (3D integrated circuits) thermal profiles has become important. Present commercial thermal analysis tools are incapable of handling very complex structures and have integration difficulties with existing design flows. Many analytical thermal models, which could provide fast estimates, are either too specific or oversimplified. This paper highlights a methodology, which exploits electrical resistance solvers for thermal simulation, to allow acquisition of thermal profiles of complex structures with good accuracy and reasonable computation cost. Moreover, a novel accurate closed-form thermal model is developed. The model allows an isotropic or anisotropic equivalent medium to replace the noncritical back-end-of-line (BEOL) regions so that the simulation complexity is dramatically reduced. Using these techniques, this paper introduces the thermal modeling of practical complex VLSI structures to facilitate thermal guideline generation. It also demonstrates the benefits of the proposed anisotropic equivalent medium approximation for real VLSI structures in terms of the accuracy and computational cost. © 2006 IEEE.en_HK
dc.languageengen_US
dc.publisherIEEE.-
dc.relation.ispartofIEEE Transactions on Advanced Packagingen_HK
dc.rightsIEEE Transactions on Advanced Packaging. Copyright © IEEE.-
dc.rights©2010 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.-
dc.rightsCreative Commons: Attribution 3.0 Hong Kong License-
dc.subjectEquivalent thermal conductivityen_HK
dc.subjectfinite difference methoden_HK
dc.subjectinterconnectsen_HK
dc.subjectJoule heatingen_HK
dc.subjectpackagingen_HK
dc.subjectresistance solveren_HK
dc.subjectthermal analysisen_HK
dc.subjectthree-dimensional integration (3DI)en_HK
dc.subjectvery-large-scale integration (VLSI)en_HK
dc.titleA thermal simulation process based on electrical modeling for complex interconnect, packaging, and 3DI structuresen_HK
dc.typeArticleen_HK
dc.identifier.emailJiang, L:ljiang@eee.hku.hken_HK
dc.identifier.authorityJiang, L=rp01338en_HK
dc.description.naturepublished_or_final_version-
dc.identifier.doi10.1109/TADVP.2010.2090348en_HK
dc.identifier.scopuseid_2-s2.0-78651282169en_HK
dc.identifier.hkuros195264en_US
dc.relation.referenceshttp://www.scopus.com/mlt/select.url?eid=2-s2.0-78651282169&selection=ref&src=s&origin=recordpageen_HK
dc.identifier.volume33en_HK
dc.identifier.issue4en_HK
dc.identifier.spage777en_HK
dc.identifier.epage786en_HK
dc.identifier.isiWOS:000286010500005-
dc.publisher.placeUnited Statesen_HK
dc.identifier.scopusauthoridJiang, L=36077777200en_HK
dc.identifier.scopusauthoridXu, C=31767769100en_HK
dc.identifier.scopusauthoridRubin, BJ=7201761344en_HK
dc.identifier.scopusauthoridWeger, AJ=7004252004en_HK
dc.identifier.scopusauthoridDeutsch, A=7102025083en_HK
dc.identifier.scopusauthoridSmith, H=7406226774en_HK
dc.identifier.scopusauthoridCaron, A=7005546788en_HK
dc.identifier.scopusauthoridBanerjee, K=7102724770en_HK

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