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Conference Paper: Concurrent simulation of decoupled power electronic circuits
Title | Concurrent simulation of decoupled power electronic circuits |
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Authors | |
Keywords | Algorithms Computer Aided Network Analysis Computer Simulation Electric Network Topology Mathematical Models Parallel Processing Systems Transmission Line Theory |
Issue Date | 1993 |
Citation | Iee Conference Publication, 1993, v. 7 n. 377, p. 18-23 How to Cite? |
Abstract | This paper describes the parallel simulation of a multi-stage power electronic circuit using the transmission line modelling (TLM) method. In this approach, a large stiff circuit can be decoupled into smaller sub-circuits by TLM links. Each sub-circuit is then formulated with a small system matrix and simulated in one program module. The overall simulation is done by running all the program modules in parallel. This parallel simulation allows significant speed improvements over normal sequential simulation, as shown by the results of numerical experimentation. |
Persistent Identifier | http://hdl.handle.net/10722/136922 |
ISSN | 2019 SCImago Journal Rankings: 0.101 |
DC Field | Value | Language |
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dc.contributor.author | Fung, KK | en_HK |
dc.contributor.author | Hui, SYR | en_HK |
dc.contributor.author | Christopoulos, C | en_HK |
dc.date.accessioned | 2011-07-29T02:13:33Z | - |
dc.date.available | 2011-07-29T02:13:33Z | - |
dc.date.issued | 1993 | en_HK |
dc.identifier.citation | Iee Conference Publication, 1993, v. 7 n. 377, p. 18-23 | en_HK |
dc.identifier.issn | 0537-9989 | en_HK |
dc.identifier.uri | http://hdl.handle.net/10722/136922 | - |
dc.description.abstract | This paper describes the parallel simulation of a multi-stage power electronic circuit using the transmission line modelling (TLM) method. In this approach, a large stiff circuit can be decoupled into smaller sub-circuits by TLM links. Each sub-circuit is then formulated with a small system matrix and simulated in one program module. The overall simulation is done by running all the program modules in parallel. This parallel simulation allows significant speed improvements over normal sequential simulation, as shown by the results of numerical experimentation. | en_HK |
dc.language | eng | en_US |
dc.relation.ispartof | IEE Conference Publication | en_HK |
dc.subject | Algorithms | en_US |
dc.subject | Computer Aided Network Analysis | en_US |
dc.subject | Computer Simulation | en_US |
dc.subject | Electric Network Topology | en_US |
dc.subject | Mathematical Models | en_US |
dc.subject | Parallel Processing Systems | en_US |
dc.subject | Transmission Line Theory | en_US |
dc.title | Concurrent simulation of decoupled power electronic circuits | en_HK |
dc.type | Conference_Paper | en_HK |
dc.identifier.email | Hui, SYR:ronhui@eee.hku.hk | en_HK |
dc.identifier.authority | Hui, SYR=rp01510 | en_HK |
dc.description.nature | link_to_subscribed_fulltext | en_US |
dc.identifier.scopus | eid_2-s2.0-0027844049 | en_HK |
dc.identifier.volume | 7 | en_HK |
dc.identifier.issue | 377 | en_HK |
dc.identifier.spage | 18 | en_HK |
dc.identifier.epage | 23 | en_HK |
dc.identifier.scopusauthorid | Fung, KK=7202934759 | en_HK |
dc.identifier.scopusauthorid | Hui, SYR=7202831744 | en_HK |
dc.identifier.scopusauthorid | Christopoulos, C=35510119400 | en_HK |
dc.identifier.issnl | 0537-9989 | - |