Showing results 1 to 6 of 6
| Title | Author(s) | Issue Date | Views | |
|---|---|---|---|---|
A numerical study of Si-TMD contact with n/p type operation and interface barrier reduction for sub-5 nm monolayer MoS<inf>2</inf> FET Proceeding/Conference:International Electron Devices Meeting (IEDM) | 2017 | 15 | ||
| 2016 | 7 | |||
Hybrid Si/TMD 2D electronic double channels fabricated using solid CVD few-layer-MoS2 stacking for V<inf>th</inf> matching and CMOS-compatible 3DFETs Proceeding/Conference:International Electron Devices Meeting (IEDM) | 2015 | 7 | ||
MoS<inf>2</inf> U-shape MOSFET with 10 nm channel length and poly-Si source/drain serving as seed for full wafer CVD MoS<inf>2</inf> availability Proceeding/Conference:Digest of Technical Papers - Symposium on VLSI Technology | 2016 | 8 | ||
| 2019 | 5 | |||
TMD FinFET with 4 nm thin body and back gate control for future low power technology Proceeding/Conference:International Electron Devices Meeting (IEDM) | 2015 | 12 |