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Article: VLSI Implementation of Double-Precision Floating-Point Multiplier Using Karatsuba Technique

TitleVLSI Implementation of Double-Precision Floating-Point Multiplier Using Karatsuba Technique
Authors
Issue Date2013
PublisherBirkhaeuser Boston. The Journal's web site is located at http://link.springer.de/link/service/journals/00034/
Citation
Circuits, Systems, and Signal Processing, 2013, v. 32, p. 15-27 How to Cite?
Persistent Identifierhttp://hdl.handle.net/10722/249997
ISSN
2017 Impact Factor: 1.998
2015 SCImago Journal Rankings: 0.571
ISI Accession Number ID

 

DC FieldValueLanguage
dc.contributor.authorJaiswal, MK-
dc.contributor.authorCheung, RCC-
dc.date.accessioned2017-12-20T09:19:10Z-
dc.date.available2017-12-20T09:19:10Z-
dc.date.issued2013-
dc.identifier.citationCircuits, Systems, and Signal Processing, 2013, v. 32, p. 15-27-
dc.identifier.issn0278-081X-
dc.identifier.urihttp://hdl.handle.net/10722/249997-
dc.languageeng-
dc.publisherBirkhaeuser Boston. The Journal's web site is located at http://link.springer.de/link/service/journals/00034/-
dc.relation.ispartofCircuits, Systems, and Signal Processing-
dc.rightsThe final publication is available at Springer via http://dx.doi.org/[insert DOI]-
dc.titleVLSI Implementation of Double-Precision Floating-Point Multiplier Using Karatsuba Technique-
dc.typeArticle-
dc.identifier.emailJaiswal, MK: manishkj@hku.hk-
dc.identifier.doi10.1007/s00034-012-9457-3-
dc.identifier.hkuros280301-
dc.identifier.volume32-
dc.identifier.spage15-
dc.identifier.epage27-
dc.identifier.isiWOS:000313785100002-
dc.publisher.placeUnited States-

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