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Conference Paper: Scheduling mixed-architecture processes in tightly coupled FPGA-CPU reconfigurable computers

TitleScheduling mixed-architecture processes in tightly coupled FPGA-CPU reconfigurable computers
Authors
Issue Date2014
PublisherIEEE Computer Society. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/conhome.jsp?punumber=1000289
Citation
The IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM 2014), Boston, MA., 11-13 May 2014. In Conference Proceedings, 2014, p. 240 How to Cite?
AbstractThe design and implementation of a multitasking run-time system on a tightly coupled FPGA-CPU platform is presented. Using a mix of CPU and FPGA programmable logic for computing, user applications are executed as mixed-architecture processes from the perspective of the OS. Context switching mechanisms with hybrid scheduling containing both blocking and preemption support were implemented to support concurrent execution of multiple mixed-architecture processes, and evaluated under a synthetic workload.
Persistent Identifierhttp://hdl.handle.net/10722/201237
ISBN

 

DC FieldValueLanguage
dc.contributor.authorHamilton, BKen_US
dc.contributor.authorInggs, Men_US
dc.contributor.authorSo, HKHen_US
dc.date.accessioned2014-08-21T07:18:19Z-
dc.date.available2014-08-21T07:18:19Z-
dc.date.issued2014en_US
dc.identifier.citationThe IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM 2014), Boston, MA., 11-13 May 2014. In Conference Proceedings, 2014, p. 240en_US
dc.identifier.isbn978-1-4799-5111-6-
dc.identifier.urihttp://hdl.handle.net/10722/201237-
dc.description.abstractThe design and implementation of a multitasking run-time system on a tightly coupled FPGA-CPU platform is presented. Using a mix of CPU and FPGA programmable logic for computing, user applications are executed as mixed-architecture processes from the perspective of the OS. Context switching mechanisms with hybrid scheduling containing both blocking and preemption support were implemented to support concurrent execution of multiple mixed-architecture processes, and evaluated under a synthetic workload.en_US
dc.languageengen_US
dc.publisherIEEE Computer Society. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/conhome.jsp?punumber=1000289en_US
dc.relation.ispartofAnnual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM) Proceedingsen_US
dc.rightsCreative Commons: Attribution 3.0 Hong Kong Licenseen_US
dc.rights©2014 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.en_US
dc.titleScheduling mixed-architecture processes in tightly coupled FPGA-CPU reconfigurable computersen_US
dc.typeConference_Paperen_US
dc.identifier.emailSo, HKH: skhay@hkucc.hku.hken_US
dc.identifier.authoritySo, HKH=rp00169en_US
dc.description.naturepublished_or_final_version-
dc.identifier.doi10.1109/FCCM.2014.75en_US
dc.identifier.hkuros234180en_US
dc.identifier.spage240en_US
dc.identifier.epage240en_US
dc.publisher.placeUnited States-
dc.customcontrol.immutablesml 140822-

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