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  Patent History
  • Application
    US 11/065413 2005-02-24
  • Publication
    US 2005196685 2005-09-08

published patent: Rectangular contact lithography for circuit performance improvement and manufacture cost reduction

TitleRectangular contact lithography for circuit performance improvement and manufacture cost reduction
Priority Date2005-02-24 US 11/065413
2004-02-24 US 10/546948P
Inventors
Issue Date2005
Citation
US Published patent application US 2005196685. Washington, DC: US Patent and Trademark Office (USPTO), 2005 How to Cite?
AbstractAn optical lithography method is disclosed that uses double exposure of a reusable template mask and a trim mask to fabricate regularly-placed rectangular contacts in standard cells of application-specific integrated circuits (ASICs). A first exposure of the reusable template mask with periodic patterns forms periodic dark lines on a wafer and a second exposure of an application-specific trim mask remove the unwanted part of the dark lines and the small cuts of the dark lines left form the rectangular regularly-placed contacts. All contacts are placed regularly in one direction while unrestrictedly in the perpendicular direction. The regular placement of patterns on the template mask enable more effective use of resolution enhancement technologies, which in turn allows a decrease in manufacturing cost and the minimum contact size and pitch.; Since there is no extra application-specific mask needed comparing with the conventional lithography method for unrestrictedly-placed contacts, the extra cost is kept to the lowest. The method of the invention can be used in the fabrication of standard cells in application-specific integrated circuits (ASICs) to improve circuit performance and decrease circuit area and manufacturing cost.
Persistent Identifierhttp://hdl.handle.net/10722/176901

 

DC FieldValueLanguage
dc.date.accessioned2012-11-30T08:38:43Z-
dc.date.available2012-11-30T08:38:43Z-
dc.date.issued2005-
dc.identifier.citationUS Published patent application US 2005196685. Washington, DC: US Patent and Trademark Office (USPTO), 2005en_HK
dc.identifier.urihttp://hdl.handle.net/10722/176901-
dc.description.abstractAn optical lithography method is disclosed that uses double exposure of a reusable template mask and a trim mask to fabricate regularly-placed rectangular contacts in standard cells of application-specific integrated circuits (ASICs). A first exposure of the reusable template mask with periodic patterns forms periodic dark lines on a wafer and a second exposure of an application-specific trim mask remove the unwanted part of the dark lines and the small cuts of the dark lines left form the rectangular regularly-placed contacts. All contacts are placed regularly in one direction while unrestrictedly in the perpendicular direction. The regular placement of patterns on the template mask enable more effective use of resolution enhancement technologies, which in turn allows a decrease in manufacturing cost and the minimum contact size and pitch.; Since there is no extra application-specific mask needed comparing with the conventional lithography method for unrestrictedly-placed contacts, the extra cost is kept to the lowest. The method of the invention can be used in the fabrication of standard cells in application-specific integrated circuits (ASICs) to improve circuit performance and decrease circuit area and manufacturing cost.en_HK
dc.relation.isreferencedbyFR 2974235 (A1) 2012-10-19en_HK
dc.relation.isreferencedbyUS 8079008 (B2) 2011-12-13en_HK
dc.relation.isreferencedbyUS 2009249259 (A1) 2009-10-01en_HK
dc.relation.isreferencedbyUS 2009057743 (A1) 2009-03-05en_HK
dc.relation.isreferencedbyUS 8021933 (B2) 2011-09-20en_HK
dc.relation.isreferencedbyUS 2008203586 (A1) 2008-08-28en_HK
dc.relation.isreferencedbyUS 7763987 (B2) 2010-07-27en_HK
dc.relation.isreferencedbyUS 2008197394 (A1) 2008-08-21en_HK
dc.relation.isreferencedbyUS 7867912 (B2) 2011-01-11en_HK
dc.rightsCreative Commons: Attribution 3.0 Hong Kong License For Public Patent Documentsen_US
dc.titleRectangular contact lithography for circuit performance improvement and manufacture cost reductionen_HK
dc.typePatenten_US
dc.description.naturepublished_or_final_versionen_US
dc.contributor.inventorWang Junen_HK
dc.contributor.inventorWong Alfred Ken_HK
dc.contributor.inventorLam, EYMen_HK
patents.identifier.applicationUS 11/065413en_HK
patents.description.assigneeWANG JUN, ; WONG ALFRED K, ; LAM EDMUND Y, ; THE UNIVERSITY OF HONG KONGen_HK
patents.description.countryUnited States of Americaen_HK
patents.date.publication2005-09-08en_HK
patents.date.application2005-02-24en_HK
patents.date.priority2005-02-24 US 11/065413en_HK
patents.date.priority2004-02-24 US 10/546948Pen_HK
patents.description.ccUSen_HK
patents.identifier.publicationUS 2005196685en_HK
patents.relation.familyUS 2005196685 (A1) 2005-09-08en_HK
patents.relation.familyUS 7569308 (B2) 2009-08-04en_HK
patents.relation.familyWO 2005081066 (A1) 2005-09-01en_HK
patents.description.kindA1en_HK
patents.typePatent_publisheden_HK

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