Versatile Model Order Reduction of Frequency-Dependent VLSI Interconnect Models


Grant Data
Project Title
Versatile Model Order Reduction of Frequency-Dependent VLSI Interconnect Models
Principal Investigator
Dr Wong, Ngai   (Principal investigator)
Co-Investigator(s)
Professor Koh Cheng Kok   (Co-Investigator)
Duration
41
Start Date
2007-09-01
Completion Date
2011-01-31
Amount
570024
Conference Title
Presentation Title
Keywords
model reduction, VLSI interconnect, CAD and EDA, fast algorithms
Discipline
Electronics,Others - Electrical and Electronic Engineering
Sponsor
RGC General Research Fund (GRF)
HKU Project Code
HKU 717407E
Grant Type
General Research Fund (GRF)
Funding Year
2007/2008
Status
Completed
All Publications
TitleAuthor(s)Issue DateViews
 
Robust simulation methodology for surface-roughness loss in interconnect and package modelings
Journal:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2009
87
 
Passivity test of immittance descriptor systems based on generalized hamiltonian methods
Journal:IEEE Transactions on Circuits and Systems II: Express Briefs
2010
104
 
2009
95
 
An effective formulation of coupled electromagnetic-TCAD simulation for extremely high frequency onward
Journal:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2011
64