Showing results 3 to 4 of 4
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| Title | Author(s) | Issue Date | Views | |
|---|---|---|---|---|
Series Expansion based Efficient Architectures for Double Precision Floating Point Division Journal:Circuits, Systems, and Signal Processing | 2014 | 38 | ||
Unified Architecture for Double/Two-Parallel Single Precision Floating Point Adder Journal:IEEE Transactions on Circuits and Systems II: Express Briefs | 2014 | 44 |